The ever-expanding capabilities of electronic systems have been shaping our lives for decades. Exponential increases in energy efficiency and miniaturization have enabled previously unimaginable applications, including translating languages in real-time and wearable devices for improving our health. However, conventional methods for improving electronics (transistor scaling, specialized accelerators, etc.) are yielding diminishing returns. This is igniting an increasingly rich set of new research directions, ranging from new physics (spin-, magnetic-, tunneling-, and photonic-based devices) to new nanomaterials (carbon nanotubes, two-dimensional materials, superconductors) to new devices (non-volatile embedded memories, ferroelectric-based logic and memories, q-bits) to new systems, architectures, and integration techniques (advanced die- and wafer-stacking, monolithic three-dimensional (3D) integration, on-chip photonic interconnects). Yet such a promising – and overwhelming – set of options raises critical questions:

• Which technology, or combination of technologies, gives the best "bang for the buck," and for which applications?


• How will new technology capabilities change the way that we design systems?


• What new design techniques will be required to overcome major imperfections and variations that are inherent to emerging nanotechnologies? How will these techniques be implemented in electronic design automation (EDA) tools to realize practical very-large-scale integrated (VLSI) systems?

Answering these questions is central to our group's research objective: to realize future generations of energy-efficient VLSI systems by coordinating new technology advances in nanomaterials, devices, systems, architectures, and integration. We focus in the field of emerging nano-design: discovering and developing new circuits, systems, and design methodologies that leverage the unique benefits of new technologies while simultaneously overcoming their inherent challenges. Rather than focusing on isolated improvements in devices, circuits, or architectures, our group investigates interactions between technologies across the computing stack to achieve far-larger benefits overall. Such coordinated efforts will require interdisciplinary collaborations in the following key areas, which we actively pursue:

1. End-to-end technology evaluation and development - unfortunately, common small-scale benchmarking today does not account for many effects present in realistic VLSI systems (e.g., interconnect routing parasitics, application-level timing constraints, process variations), leading to incorrect conclusions. In contrast, an end-to-end evaluation framework is essential, including: (a) energy-efficient circuit-/system-level techniques to overcome inherent imperfections and variations, (b) full physical design of VLSI systems (potentially requiring new EDA methodologies), and (c) variation-aware power/timing design and optimization, calibrated to experimental data, running real applications, and meeting circuit-level yield, test, and noise immunity constraints. With this approach, we have demonstrated that carbon nanotube (CNT) field-effect transistors (CNFETs) offer major energy efficiency benefits for sub-10 nm node digital VLSI circuits, even in the presence of substantial CNT variations (collaborators: imec, TSMC). We intend to extend this methodology to evaluate new combinations of technologies moving forward.


2. New nanosystem opportunities - finding the "best" transistor or memory technologies alone is insufficient to satisfy future application demands. Instead, heterogeneous integration of multiple technologies in monolithic 3D "nanosystems" can improve energy efficiency by >100× vs. systems today (quantified by Energy-Delay Product (EDP), using the techniques described above). Nanosystems are becoming a reality; my collaborators and I experimentally demonstrated a 16-bit microprocessor built from >14,700 CNFETs, with more demonstrations underway as part of DARPA's 3DSoC program (standing-up monolithic 3D systems in a foundry).


3. Future system challenges - Looking farther into the future, our group also pursues new types of systems that do not exist today, and which consequently pose new sets of formidable challenges. For instance, future nanosystems could be so small that they will require novel communication paradigms (many systems today are already limited by bulky connectors or even bond pads for wire bonds), and could use such little power that they will not require dedicated power sources. We anticipate that new solutions will be deeply rooted in "emerging nano-design" by combining advances in new materials, fabrication, device models, circuit/system design methods, architectures, software, applications, system form factors, and yield/reliability/test models. Building upon our collaborations with experts in each of these areas – to both design and experimentally demonstrate the moscomplex beyond-silicon nanosystems to-date – we seek to enable new applications by creating the new electronic systems that they require.

Our group strives to lead the new discipline of emerging nano-design. We seek out work that is inherently interdisciplinary, requiring close collaborations among experimentalists, computer scientists, theorists, and more, in both academia and industry. With successful coordination, emerging nano-design promises to drive the development of next-generation computing systems and can broaden the applications of electronics.