Research
Our goal to develop future generations of energy-efficient and environmentally sustainable computing systems. Our approach is to combine recent technology advances across the computing stack, spanning nanomaterials, devices, circuits, architectures, and three-dimensional integration techniques. We think about computing in a broad sense, holistically considering the broad ecosystem required to develop and maintain today's most energy-efficient computing systems, including underlying technologies for computation, communication, memory, thermal management, and sustainable manufacturing.
As a driving application, we aim to improve datacenter-scale computing systems, which are used to serve humanity’s largest computing needs, such as training large models for Artificial Intelligence (AI). Key figures of merit are: performance (quantified in Hertz, e.g., computations per second), energy efficiency (in Joules per Hertz), and carbon efficiency (in CO2 emissions per Hertz).
We focus on three research thrusts, which I summarize here. For more details, check out the linked papers, see my google scholar page for the most up-to-date publications, and feel free to reach out to me directly for more information (ghills at seas dot harvard dot edu).
Thrust 1: 3D Integration of Emerging Technologies for Energy-Efficient Computing - this thrust builds upon my core expertise that I developed as a PhD student and postdoc (up until I started at Harvard in July 2021), in which my research in energy- efficient computing focused on developing energy-efficient monolithic three-dimensional integrated circuits (3D ICs) using carbon nanotube field-effect transistors (CNFETs) [Srimani VLSI 23], [Srimani & Hills VLSI 20], [Hills & Lau Nature 19], [Srimani & Hills VLSI 19], [Ho TNANO 19], [Hills TNANO 18], [Shulaker & Hills Nature 17], [Hills TCAD 15], [Shulaker & Hills Nature 13], [Hills DAC 13]. At Harvard, our research has evolved along with the explosion of technology options for designing heterogeneous 3D computing systems… specific technologies that our group is developing include: materials for energy-efficient computation and memory (CNTs, 2D materials, thin film oxides such as IGZO for embedded DRAM, ferroelectric materials for non-volatile memories), materials for electro-optic communication (silicon photonics, lithium niobate, barium titanate), various 3D integration techniques (monolithic 3D, face-to-face bonding of separate chips, chiplet integration on interposers), and computing architectures that specifically leverage these technologies (e.g., processing near memory, chiplet architectures, distributed computing architectures). If an emerging technology has the potential to improve computing, we first quantify its potential from a system-level point-of-view, and continue to develop it if and only if it provides benefits for realistic applications
Thrust 2: CO2-Efficient Computing - our group is contributing to a global paradigm shift in computing: the evolution from energy-efficient computing to CO2-efficient computing, i.e., enabling high performance computing systems that simultaneously have a small carbon footprint. For energy-efficient computing, energy is considered as the valuable resource that is consumed achieve high-performance computing. For CO2-efficient computing, carbon emissions are instead considered as the resource. CO2 emissions include both embodied carbon, due to physical manufacturing, and operational carbon, from day-to-day use. Considering the manufacturing stage is a new concept for system designers. Our group is leading three directions in CO2-efficient computing.
- Defining metrics of carbon efficiency, instead of energy efficiency, that designers can target to optimize computing systems. Extensive details will be in our accepted paper at the High-Performance Computer Architecture (HPCA) conference in 2025: CORDOBA: Carbon-Efficient Optimization Framework for Computing Systems [Elgamal HPCA 25]. Preliminary results are in [Elgamal HotCarbon 23] and [Elgamal arXiv 23].
- Developing techniques to predictively model the embodied CO2 of future computing systems that do not exist yet. Details will be in our accepted DATE paper (Best Paper Award candidate): Quantifying Trade-Offs in Power, Performance, Area, and Total Carbon Footprint of Future Three-Dimensional Integrated Computing Systems, which will be available in April 2025 [Grey-Stewart & Kong DATE 25].
- Leveraging robust optimization algorithms to improve CO2 efficiency, despite uncertainty in carbon accounting. Preliminary results are in our upcoming HPCA paper [Elgamal HPCA 25] and in [Elgamal HotCarbon 23].
To support these efforts, I am part of a 14 investigator team, led by David Brooks at Harvard, that NSF selected for their Expeditions in Computing program. Our project is: Carbon Connect: An Ecosystem for Sustainable Computing [Carbon Connect arXiv 24], [Carbon Connect website], [Carbon Connect NSF Expeditions in Computing 24]. Our Nano-Design Group is leading our effort in improving computing’s embodied carbon footprint. Our group is also leading new directions in reducing computing’s use of so-called “forever chemicals”. Our paper will appear in DATE in 2025: PFASware: Quantifying the Environmental Impact of Per- and Polyfluoroalkyl Substances (PFAS) in Computing Systems [Elgamal DATE 25].
Thrust 3: 3D-Integrated Electronic-Photonic Circuits for Energy-Efficient Communication - as computing has continued to evolve, it has become increasingly clear that the sheer size of problems we want to solve, e.g., training larger and larger large language models (LLMs), is severely outpacing the size of problem we can solve with a single IC – monolithic 3D IC or not. For example, it took 25,000 NVIDIA A100 Graphics Processing Units (GPUs) 100 days to train GPT-4, with an estimated energy consumption of 50 GWh [GPT-4]. Thus, since I joined Harvard, my research thrusts have evolved to align with the impeding grand challenges associated with state-of-the-art computing. Developing 3D ICs is insufficient alone to improve computing performance. Datacenter-scale computing systems are becoming increasingly disaggregated. Instead of circumventing off-chip communication, we must attack it directly. Our research in thrust 3 aligns with this challenge, by improving the energy efficiency of electro-optic communication, with efforts in two sub-thrusts:
Optical digital logic circuits for high-bandwidth communication - photonic integrated circuits are an active area of research for applications in high-performance optical data communication for datacenter-scale computing. A key benefit is that optical data communication – over optical fiber between computing server racks, or over optical waveguides between chiplets on photonic interposers – enables high bandwidth point-to-point communication with signals traveling at the speed of light. On the other hand, a major drawback of today’s optical interconnect systems, which my research group aims to overcome, is that energy-efficient general purpose digital logic circuits (akin to our static CMOS digital logic circuits) has not been efficiently implemented in the optical domain. A critical review of requirements for optical digital logic circuits is offered by Rolf Landauer in [Landauer 90]. Due to a lack of efficient optical digital logic circuits, complex routing networks requiring reconfigurability still rely on electronic circuits to modulate optical routing elements. Examples include: optical network switches to support all-to-all communication between a set of N computing nodes, or packet-based routing systems in which a header packet (e.g., 128 bits) is transmitted immediately before a data packet (e.g., 1024 bits), and includes information on the intended destination of the packet. Unfortunately, the reliance on electrical switching imposes significant power and performance overheads, such as data conversion overheads back-and-forth between the optical and electrical domain, and overall performance limited by the speed of electrical circuits to drive physically large electro-optical modulators such as Mach-Zehnder Modulators (MZMs) or Micro-Ring Resonators (MRMs).
To overcome this challenge, our research group and collaborators are developing an all-optical logic family (comprising networks of Boolean logic gates such as “not-and” gates) for energy-efficient general purpose digital optical communication. To perform non-linear operations (required for digital logic [Landauer 90]), our techniques combine an amplifier-based circuit topology inspired by electrical logic gates, together with one of multiple options for non-linear optical process, such as second-harmonic generation (SHG) [Midwinter 68], e.g., in integrated Periodically Poled Lithium Niobate (PPLN) [Wang 18], [Jankowski 20], or the optical Kerr effect in integrated silicon photonics. So far, we have validated our techniques using detailed optical circuit simulations, and are currently working to experimentally fabricate POL circuits in Harvard’s fab [Harvard CNS].
- Fine-Grained 3D Integration of Heterogeneous Electronic & Photonic Circuits - Even with high-performance optical communication, datacenter-scale computing systems still rely on energy-efficient computation in the electrical domain. Thus, fine-grained integration of electronics and photonics is essential for minimizing overheads of converting data between optical and electrical domains. Our approach is to leverage monolithic 3D integration of electronics and photonics, in which multiple layers of electronic circuits and photonic circuits are densenly integrated in three dimensions [Kyriazidis SPIE 24]. The primary benefits of this approach are: increased density of electro-optical interfaces, and reduced overheads due to minimal interconnect (wire resistance, capacitance, and inductance), both of which lead to unparalleled energy efficiency of computation and communication. I have over a decade of experience developing monolithic 3D electronic ICs, during my PhD and post-doc. I am now leveraging that experience to expand my research in a new direction: developing monolithic 3D electronic-photonic ICs.
Towards our efforts in thrust 3, our group received NSF EAGER funding over the next 18 months (which started in fall 2024, for our project: Active Metamaterials for Computing Applications) [Hills NSF EAGER 24], which supports both design and fabrication (in Harvard CNS) of electro-optical communication circuits for applications in high-performance computing.
Concluding Remarks
This is an exciting time for computing. We are seeing an explosion of capabilities and emergent behavior from AI models. At the same time, these new capabilities bring new grand challenges. It is inevitable that humankind will continue to scale up computing. How do physical computing systems keep up with the relentlessly increasing demands of AI? How do we do that without destroying our environment? I formulated my research thrusts to address these questions. After three years at Harvard, our group has developed unique expertise at the intersection of electronics, photonics, 3D integration, and CO2-aware design, toward our goal of establishing ourselves as global leaders in energy-efficient and environmentally sustainable computing.
References
[Grey-Stewart & Kong DATE 25] Danielle Grey-Stewart, David Kong, Mariam Elgamal, Georgios Kyriazidis, Jalil Morris, and Gage Hills, “Quantifying Trade-Offs in Power, Performance, Area, and Total Carbon Footprint of Future Three-Dimensional Integrated Computing Systems,” Design, Automation, and Test in Europe (DATE), 2025. Accepted, to appear in April 2025. Best Paper Award nomination: 12 papers nominated out of 1,213 submissions. Best Papers to be selected at DATE 2025.
[Egamal HPCA 25] Mariam Elgamal, Doug Carmean, Elnaz Ansari, Okay Zed, Ramesh Peri, Srilatha Manne, Udit Gupta, Gu-Yeon Wei, David Brooks, Gage Hills, and Carole-Jean Wu, “CORDOBA: Carbon-Efficient Optimization Framework for Computing Systems,” IEEE International Symposium on High Performance Computer Architecture (HPCA), 2025. Accepted, to appear in March 2025.
[Elgamal DATE 25] Mariam Elgamal, Abdulrahman Mahmoud, Gu-Yeon Wei, David Brooks, and Gage Hills, “PFASware: Quantifying the Environmental Impact of Per- and Polyfluoroalkyl Substances (PFAS) in Computing Systems,” Design, Automation, and Test in Europe (DATE), 2025. Accepted, to appear in April 2025.
[Elgamal HotCarbon 23] Mariam Elgamal, Doug Carmean, Elnaz Ansari, Okay Zed, Ramesh Peri, Srilatha Manne, Udit Gupta, Gu-Yeon Wei, David Brooks, Gage Hills, and Carole-Jean Wu, "Carbon-Efficient Design Optimization for Computing Systems," HotCarbon, 2023.
[Elgamal arXiv 23] Mariam Elgamal, Doug Carmean, Elnaz Ansari, Okay Zed, Ramesh Peri, Srilatha Manne, Udit Gupta, Gu-Yeon Wei, David Brooks, Gage Hills, and Carole-Jean Wu, "Design Space Exploration and Optimization for Carbon-Efficient Extended Reality Systems," arXiv preprint, 2023.
[Carbon Connect arXiv 24] Benjamin C Lee, David Brooks, Arthur van Benthem, Udit Gupta, Gage Hills, Vincent Liu, Linh Phan, Benjamin Pierce, Christopher Stewart, Emma Strubell, Gu-Yeon Wei, Adam Wierman, Yuan Yao, and Minlan Yu, “Carbon Connect: An Ecosystem for Sustainable Computing,” arXiv preprint, 2024.
[Carbon Connect Website] Carbon Connect -- An Ecosystem for Sustainable Computing. [Online]. Available: https://carbonconnect.eco/.
[Carbon Connect NSF Expeditions in Computing 24] "Collaborative Research: National Science Foundation Expeditions in Computing: Carbon Connect -- An Ecosystem for Sustainable Computing," Funded Reesearch Proposal, NSF Expeditions in Computing, 2024.
[Srimani VLSI 23] Tathagata Srimani & Andrew C. Yu, Robert Radway, D. T. Rich, Mark Nelson, Simon Wong, Denis Murphy, Samuel Fuller, Gage Hills, Subhasish Mitra, and Max Shulaker, “Foundry Monolithic 3D BEOL Transistor + Memory Stack: Iso-performance and Iso-footprint BEOL Carbon Nanotube FET+RRAM vs. FEOL Silicon FET+RRAM,” IEEE Symposium on VLSI Technology, 2023.
[Srimani & Hills VLSI 20] T Srimani, G Hills, M Bishop, C Lau, P Kanhaiya, R Ho, A Amer, M Chao, A Yu, A Wright, A Ratkovich, D Aguilar, A Bramer, C Cecman, A Chov, G Clark, G Michaelson, M Johnson, K Kelley, P Manos, K Mi, U Suriono, S Vuntangboon, H Xue, J Humes, S Soares, B Jones, S Burack, Arvind, A Chandrakasan, M Nelson, and M Shulaker, “Heterogeneous Integration of BEOL Logic and Memory in a Commercial Foundry: Multi-Tier Complementary Carbon Nanotube Logic and Resistive RAM at a 130 nm Node,” IEEE Symposium on VLSI Technology, 2020.
[Hills & Lau Nature 19] Gage Hills, Christian Lau, Andrew Wright, Samuel Fuller, Mindy Bishop, Tathagata Srimani, Pritpal Kanhaiya, Rebecca Ho, Aya Amer, Yosi Stein, Denis Murphy, Arvind, Anantha Chandrakasan, and Max Shulaker, “Modern Microprocessor Built from Complementary Carbon Nanotube Transistors,” Nature, 2019.
[Srimani & Hills VLSI 19] Tathagata Srimani, Gage Hills, Christian Lau, and Max Shulaker, "Monolithic Three-Dimensional Imaging System: Carbon Nanotube Computing Circuitry Integrated Directly Over Silicon Imager," IEEE Symposum on VLSI Technology, 2019.
[Ho TNANO 19] Rebecca Ho, Christian Lau, Gage Hills, and Max Shulaker, "Carbon Nanotube CMOS Analog Circuitry," IEEE Transactions on Nanotechnology (TNANO), 2019. Best Paper Award.
[Hills TNANO 18] Gage Hills, Marie Garcia Bardon, Gerben Doornbos, Dmitry Yakimets, Pieter Schuddinck, Rogier Baert, Doyoung Jang, Luca Mattii, Syed Muhammed Yasser Sherazi, Dimitrios Rodopoulos, Romain Ritzenthaler, Chi-Shuen Lee, Aaron Voon-Yew Thean, Iuliana Radu, Alessio Spessot, Peter Debacker, Francky Catthoor, Praveen Raghavan, Max Shulaker, H.-S. Philip Wong, and Subhasish Mitra, “Understanding Energy Efficiency Benefits of Carbon Nanotube Field-Effect Transistors for Digital VLSI,” IEEE Transactions on Nanotechnology (TNANO), 2018.
[Shulaker & Hills Nature 17] Max Shulaker, Gage Hills, Rebecca Park, Roger Howe, Krishna Saraswat, H.-S. Philip Wong, and Subhasish Mitra, “Three-Dimensional Integration of Nanotechnologies for Computing and Data Storage on a Single Chip,” Nature, 2017.
[Hills TCAD 15] Gage Hills, Jie Zhang, Max Marcel Shulaker, Hai Wei, Chi-Shuen Lee, Arjun Balasingam, H.-S. Philip Wong, and Subhasish Mitra, “Rapid Co-Optimization of Processing and Circuit Design to Overcome Carbon Nanotube Variations,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2015.
[Shulaker & Hills Nature 13] Max M Shulaker, Gage Hills, Nishant Patil, Hai Wei, Hong-Yu Chen, H.-S. Philip Wong, and Subhasish Mitra, “Carbon Nanotube Computer,” Nature, 2013.
[Hills DAC 13] Gage Hills, Jie Zhang, Charles Mackin, Max Shulaker, Hai Wei, H.-S. Philip Wong, and Subhasish Mitra, "Rapid Exploration of Processing and Design Guidelines to Overcome Carbon Nanotube Variations," Design Automation Conference (DAC), 2013. Best Paper Award nomination: 8 papers nominated out of >500 submissions.
[Kyriazidis SPIE 24] Georgios Kyriazidis, Norman Lippok, John Davis, Xinrui Zhu, Hana Warner, Yaowen Hu, Marko Loncar, Benjamin Vakoc, and Gage Hills, “Time-Stepped Optical Frequency Comb Laser Design Leveraging Three-Dimensional Integration of Thin-Film Lithium Niobate and Silicon CMOS,” SPIE Smart Photonic and Optoelectronic Integrated Circuits, 2024.
[Hills NSF EAGER 24] Gage Hills, “EAGER: Active Metamaterials for Computing Applications,” Funded Research Proposal, NSF EArly-concept Grants for Exploratory Research (EAGER), 2024.
[GPT-4] Everything We Know About GPT-4. [Online]. Available: https://klu.ai/blog/gpt-4-llm.
[Landauer 90] Rolf Landauer, “Advanced Technology and Truth in Advertising,” Physica A: Statistical Mechanics and its Applications, 1990.
[Midwinter 68] JE Midwinter, “Lithium Niobate: Effects of Composition on the Refractive Indices and Optical Second-Harmonic Generation,” Journal of Applied Physics, 1968.
[Wang 18] Cheng Wang, Carsten Langrock, Alireza Marandi, Marc Jankowski, Mian Zhang, Boris Desiatov, Martin M Fejer, and Marko Lončar, “Ultrahigh-Efficiency Wavelength Conversion in Nanophotonic Periodically Poled Lithium Niobate Waveguides,” Optica, 2018.
[Jankowski 20] Marc Jankowski, Carsten Langrock, Boris Desiatov, Alireza Marandi, Cheng Wang, Mian Zhang, Christopher R Phillips, Marko Lonˇcar, and MM Fejer, “Ultrabroadband Nonlinear Optics in Nanophotonic Periodically Poled Lithium Niobate Waveguides,” Optica, 2020.
[Harvard CNS] Harvard Center for Nanoscale Systems (CNS). [Online]. Available: https://cns1.rc.fas.harvard.edu/.